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Computer Organization and Architecture

CSE 4305 is the course that helps you understand how computer hardware is organized and how it interacts with the software. We will talk about the five classic components of a computer- input, output, memory, datapath and control. 


Announcements:
  • Viewing of Mid-semester scripts: 10.30 am, Wednesday. Everyone has to be present.
  • Syllabus of the Semester Final: Everything covered so far. Chapter 2 is excluded.
  • Final Quiz on Thursday, 05 May, Tuesday, 03 May at 1.45 pm. The syllabus of the quiz are topics covered in weeks 12, 13 and 14. Please bring your own calculator.
  • Make up class: From 10.30 to 12.10, 21 April, Tuesday.
  • Quiz 3 will take place on 21 April, 1.55 pm. The syllabus of the quiz are topics covered in weeks 9,10 and 11. Please bring your own calculator, no borrowing!
  • Chapter 5 Slides uploaded.
  • Syllabus of the Mid-semester: Contents covered so far, i.e., Week 1 to Week 8.
  • Quiz 2 will take place at 1.45 pm on Thursday, March 3. Syllabus of the quiz is the materials covered in weeks 4, 5 and 6.
  • Slides of Chapter 4 is uploaded.
  • Quiz 1 will take place at 1.45 pm on Wednesday, 10 February. Syllabus of the quiz is the materials covered in the first three weeks. Please bring calculators.
  • PowerPoint Slides of the first two chapters are uploaded
  • Second Chapter PDF (MIPS version) is uploaded

Textbook:
Computer Organization and Design: The Hardware/Software Interface, by David A. Patterson and John L. Hennessy. 4th Edition

Reference books: As needed.

Lecture Schedules:

 Week      TopicReading/Comments          
 1 Introduction to the course: Logistics. High level language, compilers and assemblers. Definitions. The Power wall     1.1-1.3, 1.5
 2 Measuring Performance: Factors influencing computer performance, SPEC Benchmarks, Amdahl's Law     1.4, 1.6, Pages 48-50, 1.8
 3 Instructions: Introduction, Operations, Operands, Representing Instructions, Logical Operations 2.1-2.3, 2.5-2.6
 4 Instructions: Making Decisions, Procedures- leaf and Nested, Stack and Heap, Characters and Strings, 32-bit Immediates and Addresses, Summary of addressing modes 2.7, 2.8, 2.9 (upto page 126), 2.10
 5 Instructions: Translating and Starting a Program, An example to put it all together 2.12 (upto page 146), 2.13
 6 Processor: Introduction, Logic Design Conventions 4.1, 4.2
 7 Processor: Building a datapath, A simple implementation scheme of Controls 4.3, 4.4
 8 Processor: Pipelining overview, Pipelined Datapath and Control 4.5, 4.6                                                
 9     Processor: Data Hazards, Control Hazards, Exception     4.7, 4.8, 4.9
 10 Memory: Introduction, Basics of Cache     5.1, 5.2
 11 Memory: Measuring and Improving Cache Performance 5.3
 12 Memory: Virtual Memory, A common framework      5.4 (upto page 497), 5.5
 13 Storage and I/O: Introduction, Dependability, Disk storage, Flash storage, Connecting and Interfacing Processor-Memory and I/O     6.1, 6.2, 6.3, 6.4, 6.5, 6.6
 14 Multicores, Multiprocessors: Introduction, Difficulty of parallel programs, Shared Memory Multiprocessors, Clusters and message-passing Multiprocessors. 7.1, 7.2, 7.3, 7.4



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